Electrical testing on a memory link from the memory controller has comprised ad hock features that change on a design basis and often are software intensive and very time consuming to run. Electrical validation tools had to be rewritten for each design because there was not common configuration specification. In addition the memory testing hooks of the past have not been built into the normal functional path of the memory controller so tests had to be constructed to emulate the configuration settings for various knobs such as timing, page policy, refresh rate, and power savings.